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11	Power Aware Page Allocation Alvin R. Lebeck Department of Computer Science Duke University Add to Reading List Source URL: www.cs.duke.edu Language: English - Date: 2003-06-23 10:37:45 Computer memory Computing Computer hardware Computer engineering CPU cache Dynamic random-access memory Random-access memory
12	Servet: A Benchmark Suite for Autotuning on Multicore Clusters Jorge Gonz´alez-Dom´ınguez, Guillermo L. Taboada, Basilio B. Fraguela, Mar´ıa J. Mart´ın, Juan Touri˜no Computer Architecture Group Department of Ele Add to Reading List Source URL: www.des.udc.es Language: English - Date: 2010-07-14 07:49:10 Computing Computer architecture Computer engineering Cache Computer memory Cache hierarchy Multi-core processor Xeon Memory hierarchy Intel Core CPU cache Cache memory
13	Peer Quiz – Critical Thinking Design of Parallel and High-Performance Computing Fall 2015 Lecture: Cache Coherence & Memory Models Add to Reading List Source URL: spcl.inf.ethz.ch Language: English - Date: 2015-09-28 05:04:41 Cache coherency Computing Concurrent computing Computer hardware MESI protocol CPU cache MOESI protocol Cache Firefly MSI protocol Consistency model Write buffer
14	PostgreSQL Performance Tuning Add to Reading List Source URL: momjian.us Language: English - Date: 2016-06-19 09:39:37 Computing Software Computer architecture Computer memory Cache Central processing unit C POSIX library Sync Disk buffer CPU cache Page cache PostgreSQL
15	Managing multicore caches Silas Boyd-Wickizer, Robert Morris, Nickolai Zeldovich, M. Frans Kaashoek What this talk is about ● Add to Reading List Source URL: hpts.ws Language: English - Date: 2012-04-19 12:03:41 Computing Computer memory Computer architecture Computer hardware Computer engineering Cache CPU cache Multi-core processor Dynamic random-access memory Random-access memory Cache hierarchy Cache memory
16	Minimizing Stall Time in Single and Parallel Disk Systems Susanne Albers Naveen Garg y Abstract Add to Reading List Source URL: www14.in.tum.de Language: English - Date: 2013-11-25 11:05:53 Cache Computing Computer memory Computer architecture Computer engineering Mathematics Virtual memory Integral Locality of reference Interval Paging CPU cache
17	Adaptive Insertion Policies for High Performance Caching Moinuddin K. Qureshi† Aamer Jaleel§ Yale N. Patt† Simon C. Steely Jr.§ Joel Emer§ †ECE Department The University of Texas at Austin {moin, Add to Reading List Source URL: researcher.watson.ibm.com Language: English - Date: 2010-10-27 12:12:26 Virtual memory Cache Computing Software Computer architecture Cache algorithms CPU cache Adaptive replacement cache Thrashing Working set Paging Pseudo-LRU
18	Automatic analytical modeling for the estimation of cache misses Add to Reading List Source URL: www.des.udc.es Language: English - Date: 2014-12-23 06:06:05 Software engineering Computer programming Computing Compiler optimizations Cache Computer memory Compiler construction Optimizing compiler Programming language implementation CPU cache For loop Matrix
19	CS264: Beyond Worst-Case Analysis Lecture #3: Online Paging and Resource Augmentation∗ Tim Roughgarden† September 29, Add to Reading List Source URL: theory.stanford.edu Language: English - Date: 2014-10-06 12:17:28 Online algorithms Applied mathematics Mathematics Cache Computer science Analysis of algorithms Virtual memory Sorting algorithms Cache algorithms Competitive analysis CPU cache Algorithm
20	E cient Software-Based Fault Isolation Robert Wahbe Steven Lucco Thomas E. Anderson Add to Reading List Source URL: www.cs.cmu.edu Language: English - Date: 2003-04-04 15:00:43 Computing Computer architecture Computer engineering Central processing unit Instruction set architectures Assembly languages Processor register MIPS instruction set Instruction set Addressing mode Virtual memory CPU cache

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